Expand description
Extensions for CPU-local types that allows single-instruction operations.
For some per-CPU objects, fetching or modifying the values of them can be done in a single instruction. Then we would avoid turning off interrupts when accessing them, which incurs non-trivial overhead.
These traits are the architecture-specific interface for single-instruction operations. The architecture-specific module can implement these traits for common integer types. For architectures that don’t support such single- instruction operations, we emulate a single-instruction implementation by disabling interruptions and preemptions.
Currently we implement some of the core::ops
operations. Bitwise shift
implementations are missing. Also for less-fundamental types such as
enumerations or boolean types, the caller can cast it themselves to the
integer types, for which the operations are implemented.
§Safety
All operations in the provided traits are unsafe, and the caller should
ensure that the offset is a valid pointer to a static CpuLocalCell
object. The offset of the object is relative to the base address of the
CPU-local storage. These operations are not atomic. Accessing the same
address from multiple CPUs produces undefined behavior.
Traits§
- Single
Instruction AddAssign - An interface for architecture-specific single-instruction add operation.
- Single
Instruction BitAnd Assign - An interface for architecture-specific single-instruction bitwise AND.
- Single
Instruction BitOr Assign - An interface for architecture-specific single-instruction bitwise OR.
- Single
Instruction BitXor Assign - An interface for architecture-specific single-instruction bitwise XOR.
- Single
Instruction Load - An interface for architecture-specific single-instruction get operation.
- Single
Instruction Store - An interface for architecture-specific single-instruction set operation.
- Single
Instruction SubAssign - An interface for architecture-specific single-instruction subtract operation.