miri/shims/
aarch64.rs

1use rustc_abi::CanonAbi;
2use rustc_middle::mir::BinOp;
3use rustc_middle::ty::Ty;
4use rustc_span::Symbol;
5use rustc_target::callconv::FnAbi;
6
7use crate::*;
8
9impl<'tcx> EvalContextExt<'tcx> for crate::MiriInterpCx<'tcx> {}
10pub(super) trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
11    fn emulate_aarch64_intrinsic(
12        &mut self,
13        link_name: Symbol,
14        abi: &FnAbi<'tcx, Ty<'tcx>>,
15        args: &[OpTy<'tcx>],
16        dest: &MPlaceTy<'tcx>,
17    ) -> InterpResult<'tcx, EmulateItemResult> {
18        let this = self.eval_context_mut();
19        // Prefix should have already been checked.
20        let unprefixed_name = link_name.as_str().strip_prefix("llvm.aarch64.").unwrap();
21        match unprefixed_name {
22            "isb" => {
23                let [arg] = this.check_shim_sig_lenient(abi, CanonAbi::C, link_name, args)?;
24                let arg = this.read_scalar(arg)?.to_i32()?;
25                match arg {
26                    // SY ("full system scope")
27                    15 => {
28                        this.yield_active_thread();
29                    }
30                    _ => {
31                        throw_unsup_format!("unsupported llvm.aarch64.isb argument {}", arg);
32                    }
33                }
34            }
35
36            // Used to implement the vpmaxq_u8 function.
37            // Computes the maximum of adjacent pairs; the first half of the output is produced from the
38            // `left` input, the second half of the output from the `right` input.
39            // https://developer.arm.com/architectures/instruction-sets/intrinsics/vpmaxq_u8
40            "neon.umaxp.v16i8" => {
41                let [left, right] =
42                    this.check_shim_sig_lenient(abi, CanonAbi::C, link_name, args)?;
43
44                let (left, left_len) = this.project_to_simd(left)?;
45                let (right, right_len) = this.project_to_simd(right)?;
46                let (dest, lane_count) = this.project_to_simd(dest)?;
47                assert_eq!(left_len, right_len);
48                assert_eq!(lane_count, left_len);
49
50                for lane_idx in 0..lane_count {
51                    let src = if lane_idx < (lane_count / 2) { &left } else { &right };
52                    let src_idx = lane_idx.strict_rem(lane_count / 2);
53
54                    let lhs_lane =
55                        this.read_immediate(&this.project_index(src, src_idx.strict_mul(2))?)?;
56                    let rhs_lane = this.read_immediate(
57                        &this.project_index(src, src_idx.strict_mul(2).strict_add(1))?,
58                    )?;
59
60                    // Compute `if lhs > rhs { lhs } else { rhs }`, i.e., `max`.
61                    let res_lane = if this
62                        .binary_op(BinOp::Gt, &lhs_lane, &rhs_lane)?
63                        .to_scalar()
64                        .to_bool()?
65                    {
66                        lhs_lane
67                    } else {
68                        rhs_lane
69                    };
70
71                    let dest = this.project_index(&dest, lane_idx)?;
72                    this.write_immediate(*res_lane, &dest)?;
73                }
74            }
75
76            _ => return interp_ok(EmulateItemResult::NotSupported),
77        }
78        interp_ok(EmulateItemResult::NeedsReturn)
79    }
80}
miri/shims/aarch64.rs

miri/shims/
aarch64.rs
