miri/shims/x86/
sse3.rs

1use rustc_abi::CanonAbi;
2use rustc_middle::mir;
3use rustc_middle::ty::Ty;
4use rustc_span::Symbol;
5use rustc_target::callconv::FnAbi;
6
7use super::horizontal_bin_op;
8use crate::*;
9
10impl<'tcx> EvalContextExt<'tcx> for crate::MiriInterpCx<'tcx> {}
11pub(super) trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
12    fn emulate_x86_sse3_intrinsic(
13        &mut self,
14        link_name: Symbol,
15        abi: &FnAbi<'tcx, Ty<'tcx>>,
16        args: &[OpTy<'tcx>],
17        dest: &MPlaceTy<'tcx>,
18    ) -> InterpResult<'tcx, EmulateItemResult> {
19        let this = self.eval_context_mut();
20        this.expect_target_feature_for_intrinsic(link_name, "sse3")?;
21        // Prefix should have already been checked.
22        let unprefixed_name = link_name.as_str().strip_prefix("llvm.x86.sse3.").unwrap();
23
24        match unprefixed_name {
25            // Used to implement the _mm_h{add,sub}_p{s,d} functions.
26            // Horizontally add/subtract adjacent floating point values
27            // in `left` and `right`.
28            "hadd.ps" | "hadd.pd" | "hsub.ps" | "hsub.pd" => {
29                let [left, right] =
30                    this.check_shim_sig_lenient(abi, CanonAbi::C, link_name, args)?;
31
32                let which = match unprefixed_name {
33                    "hadd.ps" | "hadd.pd" => mir::BinOp::Add,
34                    "hsub.ps" | "hsub.pd" => mir::BinOp::Sub,
35                    _ => unreachable!(),
36                };
37
38                horizontal_bin_op(this, which, /*saturating*/ false, left, right, dest)?;
39            }
40            // Used to implement the _mm_lddqu_si128 function.
41            // Reads a 128-bit vector from an unaligned pointer. This intrinsic
42            // is expected to perform better than a regular unaligned read when
43            // the data crosses a cache line, but for Miri this is just a regular
44            // unaligned read.
45            "ldu.dq" => {
46                let [src_ptr] = this.check_shim_sig_lenient(abi, CanonAbi::C, link_name, args)?;
47                let src_ptr = this.read_pointer(src_ptr)?;
48                let dest = dest.force_mplace(this)?;
49
50                this.mem_copy(src_ptr, dest.ptr(), dest.layout.size, /*nonoverlapping*/ true)?;
51            }
52            _ => return interp_ok(EmulateItemResult::NotSupported),
53        }
54        interp_ok(EmulateItemResult::NeedsReturn)
55    }
56}
miri/shims/x86/sse3.rs

miri/shims/x86/
sse3.rs
