ostd::arch::kernel::apic

Trait ApicTimer

Source 
pub trait ApicTimer {
    // Required methods
    fn set_timer_init_count(&self, value: u64);
    fn timer_current_count(&self) -> u64;
    fn set_lvt_timer(&self, value: u64);
    fn set_timer_div_config(&self, div_config: DivideConfig);
}

Required Methods§

Source

fn set_timer_init_count(&self, value: u64)

Sets the initial timer count, the APIC timer will count down from this value.

Source

fn timer_current_count(&self) -> u64

Gets the current count of the timer. The interval can be expressed by the expression: init_count - current_count.

Source

fn set_lvt_timer(&self, value: u64)

Sets the timer register in the APIC. Bit 0-7: The interrupt vector of timer interrupt. Bit 12: Delivery Status, 0 for Idle, 1 for Send Pending. Bit 16: Mask bit. Bit 17-18: Timer Mode, 0 for One-shot, 1 for Periodic, 2 for TSC-Deadline.

Source

fn set_timer_div_config(&self, div_config: DivideConfig)

Sets timer divide config register.

Implementors§