ostd::arch::kernel::irq::ioapic

Struct IoApic

Source 
pub(super) struct IoApic {
    access: IoApicAccess,
    interrupt_base: u32,
}
Expand description

I/O Advanced Programmable Interrupt Controller (APIC).

It is used to distribute external interrupts in a more advanced manner than that of the standard 8259 PIC. With the I/O APIC, interrupts can be distributed to physical or logical (clusters of) processors and can be prioritized. Each I/O APIC typically handles 24 external interrupts.

See also https://wiki.osdev.org/IOAPIC.

Fields§

§access: IoApicAccess§interrupt_base: u32

Implementations§

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impl IoApic

Source

const TABLE_REG_BASE: u8 = 16u8

Source

pub(super) unsafe fn new( base_address: usize, base_interrupt: u32, io_mem_builder: &IoMemAllocatorBuilder, ) -> Self

§Safety

The caller must ensure that the base address is a valid I/O APIC base address.

Source

pub(super) fn enable(&mut self, index: u8, irq: &IrqLine) -> Result<()>

Enables an entry.

The caller should ensure that the IRQ line is not released before the entry is disabled. Otherwise, it will be considered a logical error.

§Errors

This method will fail if the index exceeds the I/O APIC’s maximum redirection entry, or if the entry is in use.

Source

pub(super) fn disable(&mut self, index: u8) -> Result<()>

Disables an entry.

§Errors

This method will fail if the index exceeds the I/O APIC’s maximum redirection entry, or if the entry is not in use.

Source

pub(super) fn interrupt_base(&self) -> u32

Returns the base number of the global system interrupts controlled by the I/O APIC.

Auto Trait Implementations§

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impl Freeze for IoApic

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impl RefUnwindSafe for IoApic

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impl Send for IoApic

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impl Sync for IoApic

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impl Unpin for IoApic

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impl UnwindSafe for IoApic

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