pub struct AtomicCpuSet {
bits: SmallVec<[AtomicU64; 2]>,
}
Expand description
A subset of all CPUs in the system with atomic operations.
It provides atomic operations for each CPU in the system. When the operation contains multiple CPUs, the ordering is not guaranteed.
Fields§
§bits: SmallVec<[AtomicU64; 2]>
Implementations§
Source§impl AtomicCpuSet
impl AtomicCpuSet
Sourcepub fn load(&self, ordering: Ordering) -> CpuSet
pub fn load(&self, ordering: Ordering) -> CpuSet
Loads the value of the set with the given ordering.
This operation is not atomic. When racing with a Self::store
operation, this load may return a set that contains a portion of the
new value and a portion of the old value. Load on each specific
word is atomic, and follows the specified ordering.
Note that load with Ordering::Release
is a valid operation, which
is different from the normal atomic operations. When coupled with
Ordering::Release
, it actually performs fetch_or(0, Release)
.
Sourcepub fn store(&self, value: &CpuSet, ordering: Ordering)
pub fn store(&self, value: &CpuSet, ordering: Ordering)
Stores a new value to the set with the given ordering.
This operation is not atomic. When racing with a Self::load
operation, that load may return a set that contains a portion of the
new value and a portion of the old value. Load on each specific
word is atomic, and follows the specified ordering.
Sourcepub fn add(&self, cpu_id: CpuId, ordering: Ordering)
pub fn add(&self, cpu_id: CpuId, ordering: Ordering)
Atomically adds a CPU with the given ordering.
Trait Implementations§
Auto Trait Implementations§
impl !Freeze for AtomicCpuSet
impl RefUnwindSafe for AtomicCpuSet
impl Send for AtomicCpuSet
impl Sync for AtomicCpuSet
impl Unpin for AtomicCpuSet
impl UnwindSafe for AtomicCpuSet
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