Trait PagingConstsTrait

pub(crate) trait PagingConstsTrait:
    Clone
    + Debug
    + Send
    + Sync
    + 'static {
    const BASE_PAGE_SIZE: usize;
    const NR_LEVELS: PagingLevel;
    const HIGHEST_TRANSLATION_LEVEL: PagingLevel;
    const PTE_SIZE: usize;
    const ADDRESS_WIDTH: usize;
    const VA_SIGN_EXT: bool;
}

A minimal set of constants that determines the paging system. This provides an abstraction over most paging modes in common architectures.

Required Associated Constants

const BASE_PAGE_SIZE: usize

The smallest page size. This is also the page size at level 1 page tables.

const NR_LEVELS: PagingLevel

The number of levels in the page table. The numbering of levels goes from deepest node to the root node. For example, the level 1 to 5 on AMD64 corresponds to Page Tables, Page Directory Tables, Page Directory Pointer Tables, Page-Map Level-4 Table, and Page-Map Level-5 Table, respectively.

const HIGHEST_TRANSLATION_LEVEL: PagingLevel

The highest level that a PTE can be directly used to translate a VA. This affects the the largest page size supported by the page table.

const PTE_SIZE: usize

The size of a PTE.

const ADDRESS_WIDTH: usize

The address width may be BASE_PAGE_SIZE.ilog2() + NR_LEVELS * IN_FRAME_INDEX_BITS. If it is shorter than that, the higher bits in the highest level are ignored.

const VA_SIGN_EXT: bool

Whether virtual addresses are sign-extended.

The sign bit of a Vaddr is the bit at index PagingConstsTrait::ADDRESS_WIDTH - 1. If this constant is true, bits in Vaddr that are higher than the sign bit must be equal to the sign bit. If an address violates this rule, both the hardware and OSTD should reject it.

Otherwise, if this constant is false, higher bits must be zero.

Regardless of sign extension, Vaddr is always not signed upon calculation. That means, 0xffff_ffff_ffff_0000 < 0xffff_ffff_ffff_0001 is true.

Dyn Compatibility

This trait is not dyn compatible.

In older versions of Rust, dyn compatibility was called "object safety", so this trait is not object safe.

Implementors

impl PagingConstsTrait for ostd::arch::iommu::dma_remapping::second_stage::PagingConsts

const BASE_PAGE_SIZE: usize = 4_096usize

const NR_LEVELS: PagingLevel = 3u8

const ADDRESS_WIDTH: usize = 39usize

const VA_SIGN_EXT: bool = true

const HIGHEST_TRANSLATION_LEVEL: PagingLevel = 1u8

const PTE_SIZE: usize = 8usize

impl PagingConstsTrait for ostd::arch::mm::PagingConsts

const BASE_PAGE_SIZE: usize = 4_096usize

const NR_LEVELS: PagingLevel = 4u8

const ADDRESS_WIDTH: usize = 48usize

const VA_SIGN_EXT: bool = true

const HIGHEST_TRANSLATION_LEVEL: PagingLevel = 2u8

const PTE_SIZE: usize = 8usize

impl<C: PageTableConfig> PagingConstsTrait for C

const BASE_PAGE_SIZE: usize = <C::C>::BASE_PAGE_SIZE

const NR_LEVELS: PagingLevel = <C::C>::NR_LEVELS

const HIGHEST_TRANSLATION_LEVEL: PagingLevel = <C::C>::HIGHEST_TRANSLATION_LEVEL

const PTE_SIZE: usize = <C::C>::PTE_SIZE

const ADDRESS_WIDTH: usize = <C::C>::ADDRESS_WIDTH

const VA_SIGN_EXT: bool = <C::C>::VA_SIGN_EXT